Problem Solving Techniques using C

Digital Electronics

Discrete Mathematics

Syllabus

## Ashok N. Kamthane et. al., “Computer Programming and IT”, Pearson Education, 2011

## Mahapatra, “ Thinking In C ”, PHI Publications, 1998.

## Yashwant Kanetkar, “Let Us C”, 13th Edition, PHP, 2013.

## Grewal, B.S.Higher engineering Mathematings, 36th Edition

## Satyrs S.S, Engineering Mathematics.

## Peter V.O’Neil. Advanced Engineering Mathematics, 5th Edition.

## a) The candidate has to write both the programs One from Part-A and other from Part-B and execute one program as of External examiner choice.

## b) A minimum of 10 Programs has to be done in Part-B and has to be maintained in the Practical Record.

## c) Scheme of Evaluation is as follows:

## Study of Logic Gates–AND, OR, NOT, NAND, NOR XOR

## Realization of AND, OR and NOT gates using Universal Gates.

## Design and Realization of Half Adder/Subtracted using NAND Gates. 4. Design and Realization of Full Adder using Logic Gates.

## Design and Realization of 4 bit Adder/Subtractor using IC 7483. 6. Design and Realization of BCD Adder using IC 7483.

## Realization of J-K flip flop using IC 7400 and 7410.

## Realization of T and D flip flop using IC 7476.

## Implementation of PIPO Shift Registers using flip flops. (IC 7476). 10. Design and implementation of odd and even parity checker Generator using IC 74180.

## a) The candidate has to write both the programs One from Part-A and other from Part-B and execute one program as of External examiner choice.

## b) A minimum of 10 Programs has to be done in Part-B and has to be maintained in the Practical Record.

## c) Scheme of Evaluation is as follows:

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